iosr-JVSP   Volume-5 ~ Issue-3 ~ May-June 2015

ABSTRACT: Dynamic comparators are widely used in the design of high speed analog to digital converters (ADCs).Clocked comparators are often called dynamic comparators. Dynamic double tail comparators are compared in terms of their power, speed and delay. The accuracy of comparators, which is defined by its power consumption and speed, is of keen interest in achieving over all higher performance of ADCs. In the domain of signal processing with low power VLSI, the role of ADC system is essential. Many high speed ADCs, such as flash ADCs, require high speed, low power comparators with small chip area. The dynamic comparator is based on bipolar CMOS technology. This is the combination of Bipolar and CMOS technology. The Bipolar CMOS circuit offers high speed, high gain and low output resistance, which are excellent properties for high-frequency analog amplifiers and CMOS technology offers high input resistance and is excellent for constructing simple, low-power logic gates.

Keywords- ADC (Analog to Digital converter), CMOS (Complementary Metal Oxide Semiconductor), Flash ADC, Dynamic double tail comparator, Bipolar CMOS.

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ABSTRACT: Multiple Valued Logic (MVL) has some important benefits such as increased data density, increased computational ability, reduced dynamic power dissipation Therefore with the help of Multiple Valued Logic (MVL) we have designed two quaternary multiplier architecture. The partial products in the multiplier are designed with quaternary voltage mode circuits. Each multiplier architecture is designed with two methods. The performance of two quaternary multiplier architecture is then compared based on Energy delay product (EDP) & Power delay product (PDP) . Comparison of these multiplier is done based on the analysis for power delay & area

Keywords - Multiple Valued Logic (MVL) , Quaternary logic, NMIN, NMAX.

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ABSTRACT: Quadrature Band pass ADC is well known to be adopted in order to reduce the system complexity, increase integration and improve performance by digitizing the bandpass signal directly without prior conversion to baseband. The Quadrature sigma delta modulator is analyzed for different quantization level for the different parameters like Signal to noise distortion ratio, quantization noise rejection capability for various devices. The result highlights the analysis of different quadrature bandpass modulators which provides a good order modulator and help to enhance device efficiency.

Keywords: Analog-to-digital conversion, bandpass delta-sigma modulator, Signal to Noise Ratio, Quantization Noise

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ABSTRACT:VLSI based vehicle security and accident information system is useful to avoid the accidents and to provide vehicle security against theft. Security of the vehicle is done by password. Theft information is sent to owner's mobile by using GSM module. Accident of the vehicle is detected by using pressure sensor which is connected in the vehicle. The information of accident is sent to the hospital which is nearby for the location point of view. The location of the vehicle is identified with help of most famous technique called GPS technique. So almost this work is based on VLSI. As there are different module which are used for security and accident information. In order to make the combined system that performs the purpose of vehicle security and accident information system can be achieved by interfacing. For this interfacing these modules FPGA will be used.
Keywords: Very large scale integration, Global system for mobile communication, Global positioning system and Field programmable gate array.

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