iosr-JVSP   Volume-6 ~ Issue-4 ~ Jul-Aug 2016

ABSTRACT:Implementation of Encryption Standard system (AES) by efficient code optimization and partial reconfiguration techniques has been presented in this paper. 128 bit block size and cipher key have been used for this AES implementation. Rijndael algorithm which is also referred as AES is mainly used for ensuring transmission channels security. Xilinx design tool 13.3 and Xilinx project navigator tools are used for synthesis and simulation purpose.For coding of the design, VHDL language has been used. Pipelined design has been implemented on Virtex 6 FPGA device and a throughput of 49.3Gbits/s is achieved with the frequency of 384.793 MHz

Keywords:pipelined design, AES, FPGA, throughput

[1]. Peter J. Ashenden, “The Designer’s guide to VHDL”,2 nd Edition ,San Francisco, CA, Morgan Kaufmann, 2002.

[2]. FIPS 197, “Advanced Encryption Standard (AES)”, No vember 26, 2001.

[3]. A.J. Elbirt et al.,”An FPGA implementation and Performance Evaluatio n of the AES block cipher Candidate Algorithm Finalists”, The Third Advanced Encryption Standard (AES3) Candidate Conference New York,USA,2000.

[4]. Nation Institute of Standards and Technology (NIST), Data Encryption Standard (DES), National Technical Information Service, Sprinfield, VA 22161, Oct. 1999

[5]. A J. Daemen and V. Rijmen , “AES Proposal: Rijndae l”, AES Algorithm Submission, September 3, 1999

ABSTRACT: Face detection and recognition is one of the most challenging problems in the field of image processing. One of the recent techniques in face recognition is by the sparse representation. In this paper, combination of Sparse and Histogram of Oriented Gradients (HOG) are used. In the first stage dimensionality reduction is done to reduce the amount of random variables and the features are extracted using Principal Component Analysis (PCA)........

Keywords: Face Recognition, Sparse Representation, Histogram of Oriented Gradient, Principal Component Analysis

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[5]. A. Yang, A. Ganesh, Z. Zhou, S. Sastry, and Y. Ma. Fast 𝑙1-minimization algorithms and an application in robust facerecognition: a review. Technical Report UCB/EECS-2010-13,UC Berkeley, 2010.

ABSTRACT: Flexible biosensor based wearable medical devices can act as excellent terminals in the body area electronics of health monitoring system. Benefiting from the growing advancement of electronics and communication technique are wearable medical devices, which can be worn by people and measure physiological parameters like Electro Cardio Gram (ECG), make it possible to monitor the health status continuously to observe deterioration if any, on-line basis, without causing any discomfort to the subjects or patients, in their daily life and could provide warning, even during sleep and wake up the Cardio Vascular or sleep apnea patients.........

Keywords: TFT, Flexible Biosensor, ECG , Printable Electronics, Body Area Electronics

[1] Bahman Kheradmand-Boroujeni et al., "Analog Characteristics of Fully Printed Flexible Organic Transistors Fabricated With Low-Cost Mass-Printing Techniques" IEEE Trans. Electron Devices, vol. 51, no. 5, pp 1423-1430, May 2014
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[3] S H Kim et al. "Ink-jet printed organic thin-film transistors for low-voltage driven CMOS circuits with solution processed AlOx gate insulator", IEEE Electron Device Lett, vol. 34, no. 2 pp 307-309, Feb 2013
[4] Yingzhe Hu et al. "Large-Scale Sensing System Combining Large Area Electronics and CMOS ICs for Structural- Health Monitoring", IEEE Journal of Solid State Circuits, vol. 49, no. 2, Feb 214
[5] R Shabanpour et al. Technische Universitat Dresden, Germany and N Munzenrieder et al. Swiss Federal Institute of Technology, Zurich, Switzerland "A Fully Integrated Audio Amplifier in Flexible a-IGZO TFT Technology for Printed Piezoelectric Loudspeakers", 2015 European Conference on Circuit Theory and Design (ECCTD)

ABSTRACT: Static Random Access memories are scaled down in order to improve overall density of the chip and hence to lower the power consumption of the system. So increased density but less power consumption optimises the overall system. For SRAM sense amplifiers which are important peripheral circuitry also need to be designed to optimize overall system. Scaling and process variations may change the sense amplifier characteristics which further results to the wrong decision. It has been observed that the threshold variation gives rise to the power and delay variations.........

Keywords: Offset cancellation, static random access memory (SRAM), threshold voltage mismatch, Voltage sense amplifier.

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