Volume-2 ~ Issue-2
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| Paper Type | : | Research Paper |
| Title | : | Design, Implementation and Testing of 16 bit RISC Processor |
| Country | : | India |
| Authors | : | V. R. Gaikwad |
| : | 10.9790/4200-0220104 ![]() |
ABSTRACT: Nowadays Embedded Systems have became a part of human life. The most important part of an embedded system is the embedded processor. The performance of embedded processor determines the performance of embedded system. An embedded processor is a Reduced Instruction Set Computer (RISC). In this paper the procedure for designing, implementing and testing a 16 bit RISC processor is presented. This processor was implemented in XC3S400 Field Programmable Gate Array (FPGA) and tested on XC3S400 FPGA development board. This processor is useful for demonstrating hazards in pipeline and the techniques used to solve them.
Keywords - Arithmetic and logical unit (ALU), Input output block (IOB), Integrated software environment (ISE), Look up table (LUT), Very high speed integrated circuit hardware descriptive language (VHDL)
[1] David A. Patterson and John L. Hennessy, Computer organization and design (Morgan Kaufmann, 1998)
[2] Douglas Perry, VHDL Programming (Tata McGraw Hill)
[3] John Wakerly, Digital design (PHI
- Citation
- Abstract
- Reference
ABSTRACT: In this paper, image smoothening, gradient magnitude, hystersis used in Canny edge detection algorithm is presented. The new algorithm used has a low-complexity 8-bin non-uniform gradient magnitude histogram to compute block-based hysteresis thresholds that are used by the Canny edge detector. This also achieves less memory requirements, decreased latency and increased throughput with no loss in edge detection. Furthermore, the hardware architecture of the proposed algorithm is presented in this paper and the architecture is synthesized on the Xilinx Virtex 5 FPGA. The design development is done in VHDL and simulated results are obtained using modelsim 6.3 with Xilinx 12.2.
Keywords: - Canny Edge detector, Distributed Processing, FPGA, Non-uniform quantization.
[1] L. Torres, M. Robert, E. Bourennane, and M. Paindavoine, "Implementation of a recursive real time edge detector using Retiming techniques," VLSI, Aug. 1995, pp.811 –816.
[2] J. Canny, "A computational approach to edge detection,"IEEE Trans. PAMI, vol. 8, no. 6, Nov. 1986, pp. 679 –698.
[3] Qian Xu, Chaitali Chakrabarti and Lina J. Karam,"A Distributed Canny Edge Detector and Its Implementation On FPGA", Arizona State University, Tempe, AZ. 2011.
[4] S. Varadarajan, C. Chakrabarti, L. J. Karam, and J. M.Bauza, "A Distributed psycho-visually motivated canny edge detector," IEEE ICASSP, Mar. 2010, pp. 822 –825,.
[5] Željko Hocenski, Suzana Vasilić, "Improved Canny Edge Detector in Ceramic Tiles Defect Detection", Osijek, Croatia 6-10 Nov2006.
[6] W. He and K. Yuan, "An improved Canny edge detector and its Realization on FPGA," WCICA, Jun. 2008, pp. 6561 –6564.
[7] Anand Gupta , Ravi Kumar Dalal,Rahul Gupta,Pulkit Wadhwa "DOW-Canny: An Improvised Version Of Canny Edge Detector". (ISPACS) December 2011, pp. 7-9.
- Citation
- Abstract
- Reference
ABSTRACT:Image processing plays a major role in various applications. These images may be affected from noises that lead to disorder in embedding the messages. Inorder to overcome this problem various pre-processing techniques are involved. The main objective of this paper is to segment the image through watershed segmentation of image and can embed the secret messages. Extraction of segmentation is also done by adding the more morphological operations such as erosion, dilation, eroding, smoothing with an existing detectors such as sobel operators. This paper involves in evaluating the quality of an image with various techniques such as PSNR (Peak-Signal-to-Noise Ratio). Experimental results show that our proposed technique achieve good visual quality image with excellent PSNR values. This value provides high level security and more robust when compared to other combination of transformation technique.
Keywords: Stego image, Morphological operators, Edge segmentation, PSNR
[1] "Image Segmentation by Region based and Watershed Algorithms" Wiley Encyclopedia of Computer Science and Engineering, edited
by Benjamin Wah.Copyright # 2008 John Wiley & Sons, Inc
[2] IJCSI International Journal of Computer Science Issues, Vol. 7, Issue 5,September 2010 "A Study Of Image Segmentation Algorithms
For Different Types Of Images "Krishna Kant Singh, Akansha Singh21Deptt. Of Electronics & Communication Hermes Engineering
College Roorkee India2Deptt. Of Information Technology.
[3] International Journal of Computer Science & Information Technology (IJCSIT) Vol 3, No 5, Oct 2011 DOI : 10.5121/ijcsit.2011.3509
99 "RESEARCH REVIEW FOR DIGITAL IMAGE SEGMENTATION TECHNIQUES" Ashraf A. Aly1, Safaai Bin Deris2, Nazar
Zaki3 1, 2Faculty of Computer Science.
[4] IJCST Vol. 1, Iss ue 2, December 2010 "A New Proposed Method for Image Segmentation Based on Gray Scale Morphological
Transformations" 1Shahana Bano, 2M. Surendra Prasad Babu, 3C.Naga Raju Department of C.S.E, KLEF University, Guntur Distt,
Andhra Pradesh
[5] "Parallel Algorithm for Gray-scale Image Segmentation", Harvey A. Cohen, Proc, Australian and New Zealand Conf. Intelligent
Information Systems, ANZIIS-96, Adelaide, Nov 18-20, 1996, pp 143-146.
[6] "A New Proposed Method for Image Segmentation Based on Gray Scale Morphological Transformations" Shahana Bano, M. Surendr a
Prasad Babu, C.Naga Raju december 2010 IJCSt Vol. 1, Issues 2
