iosr-JEEE   Volume-6 ~ Issue-3

Abstract: This paper provides a survey on existing survivability related problems and include the new algorithm based on existing algorithms. Survivability has become an important issue and topical subject in WDM networks. This paper reviewed the literature on survivability against multi-domain or link failures to ensure reliability in WDM networks. Survivability in multi-domain optical networks is very important, only few studies have been proposed in literature. The paper is related to protection technique in inter-domain link of multi-domain network combining the p-cycle and wavelength assignment.

Keywords— WDM, Survivability, Routing, Lightpath, protection, Optical Networks, p-cycle, multi-domain.

[1] Hamza Drid, Bernard Cousin,Miklos Molnar,Samer Lahoud"A Survey of Survivability in Multi-Domain Optimcal Networks" , Campus Uiversitaire de Beaulieu 35042 Rennes CEDEX, France. pp. 1-10, Jan 30 2010.
[2] A. Nisar and I. Hyder "Routing and Survivability Issues in Optical WDM Networks", TECHNOLOGY FORCES (Techical Forces): Journal of Engineering and Sciences, pp. 27-32, July-December 2009.
[3] Baibaswata Mohapatra,, Rajendra K. Nagaria, and Sudrshan Tiwari, " Guarenteed Protection in Survivable WDM Mesh Networks- New ILP Fornulation for Link Protection and Path Protection", Journal Of Telecommunication And Information Technology, pp. 108-113, April 2011.
[4] Guido Maier, Achille Pattavina, Simone De Patre, Mario Martinelli, " Optical Network Survivability: Protection Technique in the WDM Layer" , Photonic Network Communications, 4:3/4, 251-269,2002.
[5] Kayi Lee, Eytan Modiano, "Cross Layer Survivability In WDM-Based Networks",NSF grants CNS-0626781 and CNS-0830961 and DTRA grant number HDTRA 1-07-1-0004.,January 2010.
[6] Jeffery Kennington Eli Olinick Augustyn Ortynski and Gheoraghe Spiride, "Robust Solution for the WDM Routing and Provisioning Problem With Uncertain Demands and Single Link Failure Protection",Technical Report 01-EMIS-07, 19 November 2001.
[7] Desalegn Segni Abawollo, "Impairment-aware Survivable Routing and Regenarator Placement in WDM Networks", Master Of Science Thesis,August 31 2010.
[8] Qi Deng and Galen Sasaki, Ching-Fong Su, "Survivable IP over WDM: An Efficient Mathematical Programming Problem Formulation", Paper From Fujitsu Laboratories Of America,2008.
[9] Mandip Kumar Sandhu and Amit Kumar Garg, "A survey of P-cycle For WDM Networks", urnal Of Information and Operation Management, Issn:0976-7754 and E-Issn:097Jo6-7762,volume3,Issue 1,2012,pp-57-60,December 12,2011.
[10] D.Sheela and C.Chellamuthu, "Protection In Optical Mesh Networks: A Cost Effective Strategy Based On Topological Constraints",Malayasian Journal Of Computer Science, Vol.25(1)pp-38-55,2012.

Abstract: This paper investigates the efficient design of the PHY layer architecture for wireless body area networks (WBAN), which targets on ultra-low power consumption with reliable quality of service (QoS). A low cost baseband transceiver specification and a data processing flow are proposed with a comparatively lowcomplexity control state machine. A multifunctional digital timing synchronization scheme is also proposed, which can achieve packet synchronization and data recovery.

Keywords – Transceiver, TX Baseband, RX Baseband, WBAN

[1] R. Schmidt, T. Nörgall, J. Morsdorf, J. Bernhard, and T. Grün, ―Body area network BAN, a key infrastructure element for patient-centered medical applications,‖ Biomed. Eng., vol. 47, pp. 365–368, 2002.
[2] G. Z. Yang, Body Sensor Networks. New York: Springer, 2006
[3] B. Lo, S. Thiemjarus, R. King, and G. Yang, ―Body sensor network—A wireless sensor platform for pervasive healthcare monitoring,‖ in Proc 3rd Int. Conf. Pervasive Comput., 2005, pp. 77–80.
[4] J. Pansiot, R. C. King, D. G. Mcllwraith, B. P. L. Lo, and G. Z. Yang, ―ClimBSN: Climber performance monitoring with BSN,‖ in Proc. IEEE 5th Int. Workshop Wearable Implantable Body Sensor Netw., Jun. 2008, pp. 33–36.
[5] X. Liu, M. W. Phyu, Y. S. Wang, B. Zhao, and Y. J. Zheng, ―An ultra low power baseband transceiver IC for wireless body area networks,‖ in Proc. IEEE 5th Int.WorkshopWearable Implant. Body Sensor Netw., Jun. 2008, pp. 231–234.

Abstract: Convolution Encoding with Viterbi Decoding is a powerful method for Forward Error correction and Detection. It has been deployed in many Wireless Communication Systems to improve the limited capacity of the Communication channels. Forward Error Correction techniques that is particularly suited to a channel in which the transmitted signal is corrupted mainly by Additive White Gaussian Noise. Convolution codes which are designed with state diagram method,Viterbi Decoder includes Branch Metric Unit, Add-Compare Select unit, Survivor-Path Memory involving choices of area and power. VLSI process technologies make it possible to realize one chip high speed encoder and decoders. Fixed set of parameters of 1/2 code rate with a constraint length of 3, encoder polynomials and trace back depth is complex. This complexity is reduced by different techniques with respect to reduction in area size increase the speed and low power consumption.

Keywords: FEC, ConvolutionalEncoder, Viterbi Decoder.

[1] Jinjin He,Huaping Liu"High-speed Low-power Viterbi Decoder design for TCM Decoders"IEEE Trans. VLSI. vol 20,Apr 2012.

[2] P.Subhashini, D.R.Mahesh Varma, Implementation "Analysis of adaptive Viterbi Decoder for High Speed Applications" International Journal of Computer Applications (0975 – 8887) Volume 31– No.2, October 2011.

[3] Anubhuti Khare, Manish Saxena, Jagdish Patel, "FPGA Based Efficient Implementation of Viterbi Decoder" International Journal of Engineering and Advanced Technology (IJEAT)ISSN: 2249 – 8958, Volume-1, Issue-1, October 2011.

[4] J. He, Z. Wang, and H. Liu, "An efficient 4-D 8PSK TCM decoder architecture," IEEE Trans. Very Large Scale Integer. (VLSI) Syst., vol.18,no.5,May 2010.

[5] J. He, H. Liu, and Z. Wang, "A fast ACSU architecture for viterbi decoder using T- algorithm," in Proc. 43rd IEEE Asilomar Conf. Signals,Syst. Comput., Nov. 2009.

[6] R. A. Abdullah and N. R. Shanbhag, "Error-resilient low-power viterbi decoder architectures," IEEE Trans. Signal Process., vol. 57, no. 12,pp. 4906–4917, Dec. 2009.

[7] . Jin and C.-Y. Tsui, "Low-power limited-search parallel state viterbi decoder implementation based on scarece state transition," IEEE Trans.Very Large Scale Integer.(VLSI) Syst., vol. 15, no. 11, pp. 1172–1176,Oct. 2007.