Volume-5 ~ Issue-4
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Abstract: A novel approach to jointly optimized spatial prediction the choice of the subsequent transform in video and image compression. In this paper we improve the performance, reduce cost and high complexity .In proposed method we use the Singular value decomposition it is well known that the images, often used in variety of computer applications, are difficult to store and transmit. One possible solution to overcome this problem is to use a data compression technique where an image is viewed as a matrix and then the operations are performed on the matrix. In this paper, image compression is achieved by using singular value decomposition (SVD) technique on the image matrix. The advantage of using the SVD is the property of energy compaction and its ability to adapt to the local statistical variations of an image. Further, the SVD can be performed on any arbitrary, square, reversible and non reversible matrix of m x n size. In this paper, SVD is utilized to compress and reduce the storage space of an image. In addition, the paper investigates the effect of rank in SVD decomposition to measure the quality in terms of compression ratio and PSNR.
Index terms: Image compression, SVD (Singular Value Decomposition), De blocking filter, Blocking artifact, Video image.
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| Paper Type | : | Research Paper |
| Title | : | Column decoder using PTL for memory |
| Country | : | India |
| Authors | : | M.Manimaraboopathy, S.Sivasaravanababu, S.Sebastinsuresh A. Rajiv |
| : | 10.9790/2834-0540714 ![]() |
Abstract: Nowadays memory forms an important and necessary part of every system. In order to make the system more compact and faster, optimization of memory in terms of area, power and speed is to be made. In this paper column decoder has been implemented to minimize the power and area. The memory architecture is simulated using Laker-ADP schematic tool. The number of sense amplifiers required for MxN memory is reduced in ratio 4:1.
Keywords: Laker-ADP schematic tool, decoder, memory
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[5] Ramon Canal CTD – Master, "Memory Structures," CANS Slides based on: Introduction to CMOS VLSI Design, D. Harris
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| Paper Type | : | Research Paper |
| Title | : | Antenna Design and Comparison of Micro ICCLMA with Circular and Rectangular Patch |
| Country | : | India |
| Authors | : | S.Rajeswari, C.Rekha |
| : | 10.9790/2834-0541529 ![]() |
Abstract: In this paper, a high gain small size antennas are micro ICCLMA (Inductively Coupled Capacitively Loaded monopole antenna) with circular patch and micro ICCLMA with rectangular patch is presented. These different types of patch antenna topologies were designed with same dimensions to produce higher gain. We begin with the comparison between the antenna designs, requirements and continue with a discussion issues and simulation results. Each antenna topology is then discussed including the limitations and advantages of each. In fact, each technique is uniquely designed to produce size reduction and higher gain antennas. Among two antennas the micro ICCLMA with circular patch provides higher gain as compared to other micro ICCLMA with rectangular patch. The antenna design simulation results were done by using CST Microwave Studio. The gain of micro ICCLMA with circular patch is 46.03 dB. Keywords - Antenna radiation patterns, lumped elements, monopole antennas, patch antennas, vertically polarized antennas.
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