iosr-JCE   Volume-3 ~ Issue-1

Abstract:As it is known embedded system is a special-purpose computer system designed to perform a dedicated function. As a spice we also included robotics domain and achieved this project successfully. In this project, an automation surveillance system is achieved using PIR sensor which detects the human. Also the robot consists of a weapon detector. Once the intruder has been detected, the location will be tracked using GPS and is sent as a message to nearby police station through GSM modem placed .Mean while the robot follows the intruder with the help of ultrasonic and infra red sensor, and a camera is used for capturing the images and transfer it to CCTV.
Keywords-component; weapon detector; automation surveillance;

[1]. Mr. Ashok Kumar MAASTECH PVT ltd, project consultant
[2]. http://chipscity.com/downloads/Projects/GSM%20based%20Control%20System.pdf
[3]. chipscity.com/downloads/.../GSM%20based%20Control%20System.pdf
[4]. www.scribd.com/doc/51358421/GSM-based-ROBOT
[5]. www.circuitstoday.com www.howstuffworks.com
[6]. www.m-indya.com/gsm/gsmarchitecture.php
[7]. www.roggeweck.net/uploads/media/Student_-_GSM_Architecture.pdf
[8]. www.robosapiensindia.com/sat-robotics.php
[9]. www.robosapiensindia.com/sat-robotics.php
[10] .www.celebbest.com

Abstract: A Wallace tree multiplier using modified booth algorithm is proposed in this paper. It is an improved version of tree based Wallace tree multiplier [1] architecture. This paper aims at additional reduction of latency and power consumption of the Wallace tree multiplier. This is accomplished by the use of booth algorithm, 5:2, 4:2, and 3:2 compressor adders. An efficient VerilogHDL code has been written, successfully simulated and synthesized for Xilinx FPGA vertex-6 low power (Xc6vlx75tl-1Lff484) device, using Xilinx 12.2 ISE and XST. The result shows that the proposed architecture is around 67% faster than the existing Wallace-tree multiplier.
Keywords: Arithmetic, Booth Encoder, Compressors, Radix-8, Wallace-Tree.

[1] C.Vinoth1, V. S. Kanchana Bhaaskaran2, B. Brindha, S. Sakthikumaran, V.Kavinilavu, B.Bhaskar, M. Kanagasabapathy and B. Sharath," A Novel low power and high speed Wallace tree multiplier for risc processor",C 978-1-4244-8679-3/11/$26.00 ©2011 IEEE
[2] Sreehari veeramanchaneni, Kirthi Krishna M, Lingamneni Avinash, Sreekanth Reddy Puppala, and M.B. Srinivas," Novel Architectures for High Speed and Low power 3-2, 4-2 and 5-2 compressors"20th international conference on VLSI Design , jan 2007 , pp. 324-329.
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[4] Chen Ping-Hua and Zhao Juan , "High speed Parallel 32x32-b Multiplier Using a Radix-16 Booth Encoder".
[5] Weinan Ma, Shuguo Li, "A New High Compression Compressor for Large Multiplier", Institute of Microelectronics,
[6] Tsinghua University, Beijing 100084,P.R. China, 2008 IEEE..
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[8] Z. Wang, G. A. Jullien, and W. C. Miller, "A new design technique for column compression multipliers," IEEE Trans. Comput., vol. 44, pp. 962–970, Aug. 1995.

Abstract:Image upscaling (and more generally image interpolation) is the process of resizing a digital image. Enlarging an image is generally common for making smaller imagery fit a bigger screen in full screen mode, for example. In "zooming" an image, it is not possible to discover any more information in the image than already exists, and image quality inevitably suffers, for that reason several methods have been proposed to obtain better results, involving simple heuristics, edge modeling or statistical learning. The most powerful ones, however, present a high computational complexity and are not suitable for real time applications, while fast methods, even if edge-adaptive, are not able to provide artifacts-free images. So that's why a new method for image upscaling is proposed i.e. Iterative Curvature Based Interpolation (ICBI), it is based on a two-step grid filling and an iterative correction of the interpolated pixels obtained by minimizing an objective function depending on the second order directional derivatives of the image intensity. These are implemented in a variety of computer tools like printers, digital TV, media players, image processing packages, graphics renderers and so on.
Keywords - Upscaling, ICBI, NEDI, nVidia CUDA

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[3] S. Battiato, G. Gallo, and F. Stanco. A locally-adaptive zooming algorithm for digital images. Image and Vision Computing, 20:805– 812, 2002.
[4] M.J. Chen, C.H. Huang, and W.L. Lee. A fast edge-oriented algorithm for image interpolation. Image and Vision Computing, 23:791–798, 2005.
[5] R. Fattal. Image up sampling via imposed edge statistics. ACM Transactions on Graphics, 26(3):95, 2007.
[6] W.T. Freeman, T.R. Jones, and E.C. Pasztor. Example-based super resolution. IEEE Computer Graphics and Applications, 22(2):56–65, 2002.
[7] A. Giachetti and N. Asuni. Fast artifact free image interpolation. In Proc. BMVC 2008, 2008.
[8] D. Glasner, S. Bagon, and Michal Irani. Super-resolution from a single image. In proc. 12th International Conference on Computer Vision, pages 349–356. IEEE, 2009.
[9] Kenji Kamimura, Norimichi Tsumura, Toshiya Nakaguchi, Yoichi Miyake, and Hideto Motomura. Video super-resolution using texton substitution. In ACM SIGGRAPH 2007 posters, page 63, New York, NY, USA, 2007. ACM.
[10] K. I. Kim and Y. Kwon. Example-based learning for single-image super resolution. In Proceedings of the 30th DAGM symp. on Patt. Rec., pages 456–465, Berlin, Heidelberg, 2008. Springer-Verlag.